About Me
My name is Madhushree Muralidhara, presently working as an FPGA Design Engineer and have about 3.5 years of experience.
Expertise in Verilog/VHDL programming languages.
Have experience working on communication protocols Such as SPI, USB, MIPI CSI, AXI, Ethernet, I2C, UART.
Worked on FPGAs > Artix 7 and Zynq Ultrascale+ MpSoC.
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